Heretofore, a method for manufacturing a multilayer wiring board has been adopted by integrally laminating a prepreg or a resin film on a wired inner layer material, and a metal foil as an upper layer thereof, creating a hole for a via hole by laser to form a base electroless plating layer, and then filling in the hole for a via hole with an electrolytic plating layer formed by using an electrolytic filling plating solution (hereinafter, also simply referred to as an “electrolytic filling plating layer”).
Heretofore, a multilayer wiring board in which the hole for a via hole is not filled in has also been manufactured, and there is a demand for manufacturing a multilayer wiring board by carrying out interlayer connection at a relatively small plating thickness for a via hole whose via diameter (opening size of the hole for a via hole) is about 1.2 times larger or more, i.e., aspect ratio is approximately 0.8 or less, compared with the insulating layer thickness (depth of the hole for a via hole). A method of laminating an insulating resin and a metal foil on an inner layer wiring pattern, opening a non-through hole with a laser hole opening machine, and carrying out electroless copper plating and general electrolytic copper plating (electrolytic copper plating which is not electrolytic filling plating) is used as a method for manufacturing the multilayer wiring board in which the hole for a via hole is not filled in (Patent Literature 1).